The Molen Media Processor: Design and Evaluation
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چکیده
We present a fully operational prototype of the Molen reconfigurable processor based on the tightly coupled co-processor architectural paradigm. Within the Molen concept, a general purpose core processor controls the execution and reconfiguration of a reconfigurable co-processor, tuning the latter to various application specific algorithms. An ISA extension of only 4 instructions supports an arbitrary number of application specific functionalities running on the reconfigurable processor. The design is implemented on the Xilinx Virtex II Pro technology and is modular. For the experiments, we consider three media applications: MJPEG, MPEG2, and MPEG-4. Experimental data suggest two orders of magnitude kernel speedups, approaching 98% of the theoretical maximum speedups at the application level. The Molen infrastructure consumes trivial hardware resources. Its hardware-efficient FPGA implementation leaves 98% of the considered xc2vp20 chip area available for reconfigurable implementations of user designs.
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تاریخ انتشار 2005